A cost-effective and compact all-digital dual-loop jitter attenuator f…
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ISSN
2079-9292
vol.
11(21)
pp.
3630-3641
- 이전글A fast-lock all-digital clock generator for energy efficient chiplet-based systems 23.02.28
- 다음글An N/M-ratio all-digital clock generator with a Pseudo-NMOS comparator-based programmable divider 23.02.28
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